VHDL CODE FOR CONVERTERS

----------------------------4 BIT BINARY TO GRAY CONVERTER--------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity BintoGray is

    Port ( B : in  STD_LOGIC_VECTOR(3 DOWNTO 0);

           G : out  STD_LOGIC_VECTOR(3 DOWNTO 0));

end BintoGray;

architecture Behavioral of BintoGray is

begin

G(3)<=B(3);

G(2)<= B(2) XOR B(3);

G(1)<= B(1) XOR B(2);

G(0)<= B(0) XOR B(1);

end Behavioral;

--------------------------------N BIT BINARY TO GRAY CONVERTER-------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity NbitBin_Gray is

generic(constant n:integer:=6);

    Port ( B : in  STD_LOGIC_VECTOR (n-1 downto 0);

           G : out  STD_LOGIC_VECTOR (n-1 downto 0));

end NbitBin_Gray;

architecture Behavioral of NbitBin_Gray is

begin

process(b)

begin

for i in integer range  0 to n-2 loop

g(n-1)<=b(n-1);

g(i)<=b(i) XOR b(i+1);

end loop;

end process;

end Behavioral;